The invention relates to testing electronic devices such as integrated circuit devices.
Various tests may be performed on electronic devices such as integrated circuit (IC) devices, including functional tests, burn-in tests, and other tests. Conventionally, several techniques are available to test IC devices. For example, one type of testing involves testing singulated, packaged units (units that have been separated from other units during assembly). Multiple singulated, packaged units (e.g., eight, sixteen or more) may be mounted on a test structure and tested in parallel. IC devices that have been tested in this manner include such high density memory products as dynamic random access memories (DRAMs), static random access memories (SRAMs), electrically erasable and programmable read-only memories (EEPROMs), and flash memories. However, such test techniques typically employ relatively expensive handlers and the number of units that can be tested in parallel may be rather limited. Further, mounting singulated, packaged units into a test system may employ a relatively large amount of space since individual sockets are provided for each unit.
A test technique that allows a greater extent of parallel testing involves mounting singulated, packaged units onto load boards that have individual sockets to receive the singulated units. Each load board may contain a relatively large number of units, and several load boards may be mounted in a temperature chambers for testing. However, such load boards conventionally employ relatively expensive loading and unloading equipment, and test equipment used with the load boards may require a relatively large amount of space. Further, a tester for handling load boards having hundreds or even thousands of units may tend to be rather expensive.
Another test technique includes testing encapsulated, but not singulated, devices that are still attached to the mold strip. These devices are tested by contacting mechanical probes to the leads of units that are attached to the strip. Because of the use of contact probes, however, a large number of devices are not tested at the same time. Such a technique is typically convenient for products such as transistors or diodes that have short test times, that do not require complicated test patterns such as those used with more complex IC devices (e.g., DRAMs, EEPROMs, and so forth), and that do not need to be tested in a temperature chamber for testing at different temperatures.
A need thus exists for an improved test method and apparatus for electronic devices including IC devices.
In general, according to one embodiment, a test apparatus includes a lead frame portion on which are attached a plurality of electronic device units each having one or more pins. The lead frame portion may be mounted in a socket having conductors electrically coupled to corresponding pins of the electronic device units.
Other features and embodiments will become apparent from the following description and from the claims.